CVE-2020-0574
Summary
| CVE | CVE-2020-0574 |
|---|---|
| State | PUBLIC |
| Assigner | [email protected] |
| Source Priority | CVE Program / NVD first with legacy fallback |
| Published | 2020-03-12 21:15:00 UTC |
| Updated | 2021-07-21 11:39:00 UTC |
| Description | Improper configuration in block design for Intel(R) MAX(R) 10 FPGA all versions may allow an authenticated user to potentially enable escalation of privilege and information disclosure via physical access. |
Risk And Classification
Problem Types: NVD-CWE-noinfo
NVD Known Affected Configurations (CPE 2.3)
| Type | Vendor | Product | Version | Update | Edition | Language |
|---|---|---|---|---|---|---|
| Hardware | Intel | Max 10 Fpga | - | All | All | All |
| Hardware | Intel | Max 10 Fpga | - | All | All | All |
| Operating System | Intel | Max 10 Fpga Firmware | All | All | All | All |
| Operating System | Intel | Max 10 Fpga Firmware | All | All | All | All |
References
| Reference | Source | Link | Tags |
|---|---|---|---|
| INTEL-SA-00349 | CONFIRM | www.intel.com | Vendor Advisory |
| CVE Program record | CVE.ORG | www.cve.org | canonical |
| NVD vulnerability detail | NVD | nvd.nist.gov | canonical, analysis |
No vendor comments have been submitted for this CVE.
There are currently no legacy QID mappings associated with this CVE.