{"api_version":"1","generated_at":"2026-08-22T17:37:19+00:00","cve":"CVE-2026-74674","urls":{"html":"https://cve.report/CVE-2026-74674","api":"https://cve.report/api/cve/CVE-2026-74674.json","docs":"https://cve.report/api","cve_org":"https://www.cve.org/CVERecord?id=CVE-2026-74674","nvd":"https://nvd.nist.gov/vuln/detail/CVE-2026-74674"},"summary":{"title":"mm: fix incorrect flush address in direct page table reclaim","description":"In the Linux kernel, the following vulnerability has been resolved:\n\nmm: fix incorrect flush address in direct page table reclaim\n\nWhen zap_pte_range reclaims a page table, it does:\n\n    pte_free_tlb(tlb, pmd_pgtable(pmdval), addr);\n\nand this is unconditionally wrong: if this code executes, addr *always*\npoints one past the end of the range covered by the table.  The addr\nparameter is used to flush the TLB (really the paging-structure-cache)\nto drop references to the to-be-freed table, and any architecture that\ncares about the parameter will flush the wrong address.  (But they'll\nstill free the correct page).\n\nI think it's worth contemplating why the kernel works at all.\n\nIf we hit the offending line of code, we will first clear the PMD entry\n(line 1954, zap_empty_pte_table), then we will issue pending flushes if\nforce_flush is set (tlb_flush_mmu_tlbonly(tlb)), then we will skip the\nretry on line 1979 (phew!), and then we will do the offending\npte_free_tlb call.  *Or* we will clear the PMD entry immediately before\npte_free_tlb (line 1983, zap_pte_table_if_empty).\n\nIf we have any pending flushes (i.e. we actually zapped any last-level\nentries) at the time we clear the PMD entry, then the flush really ought\nto flush all references to the table (Linus certainly seems to think it\nwill on all architectures [0]).\n\nThe condition under which we have no accumulated flushes at the time of\nthe clear is very complex (the whole zap_pte_range function has absurdly\ncomplex control flow).  If we do hit the bad case, then we will end up\nclearing the PMD entry after the last time the range is flushed, and any\nCPU is free to cache a reference to the (empty) page table.  If this\nhappens due to an ordinary read or write, it would segfault, so it would\nbe rare.  But the cache could be speculatively filled as well.  Then\nwe'll flush the wrong address and then free and possibly reuse the\ntable.\n\nOn x86, even flushing the wrong address works on non-KPTI Intel systems\nbecause INVLPG flushes *all* paging-structure-caches, not just the ones\nfor the target address.  But INVPCID does not, and flush_tlb_one_user\nwill use INVPCID if it's available.  And then we're toast.  AMD systems\nare more susceptible: we set the EFER.TCE bit, which makes even INVLPG\nonly flush the target address.\n\nI think this might fix an issue in ripgrep reported here:\nhttps://github.com/BurntSushi/ripgrep/issues/3494\n\n[0] https://lore.kernel.org/all/CA+55aFzBggoXtNXQeng5d_mRoDnaMBE5Y+URs+PHR67nUpMtaw@mail.gmail.com/T/#u","state":"PUBLISHED","assigner":"Linux","published_at":"2026-08-22 16:16:41","updated_at":"2026-08-22 16:16:41"},"problem_types":[],"metrics":[],"references":[{"url":"https://git.kernel.org/stable/c/0b8ff21cbda8808c86b18f1b0ca2d0025af9a80a","name":"https://git.kernel.org/stable/c/0b8ff21cbda8808c86b18f1b0ca2d0025af9a80a","refsource":"416baaa9-dc9f-4396-8d5f-8c081fb06d67","tags":[],"title":"","mime":"","httpstatus":"","archivestatus":"0"},{"url":"https://git.kernel.org/stable/c/478a1c3abebfc717db0d1281a9cdd7befafee542","name":"https://git.kernel.org/stable/c/478a1c3abebfc717db0d1281a9cdd7befafee542","refsource":"416baaa9-dc9f-4396-8d5f-8c081fb06d67","tags":[],"title":"","mime":"","httpstatus":"","archivestatus":"0"},{"url":"https://www.cve.org/CVERecord?id=CVE-2026-74674","name":"CVE Program record","refsource":"CVE.ORG","tags":["canonical"]},{"url":"https://nvd.nist.gov/vuln/detail/CVE-2026-74674","name":"NVD vulnerability detail","refsource":"NVD","tags":["canonical","analysis"]}],"affected":[{"source":"CNA","vendor":"Linux","product":"Linux","version":"affected 4c640eb4181cf8de74c8b9e7c9cf16bf8d26b73e 0b8ff21cbda8808c86b18f1b0ca2d0025af9a80a git","platforms":[]},{"source":"CNA","vendor":"Linux","product":"Linux","version":"affected 4c640eb4181cf8de74c8b9e7c9cf16bf8d26b73e 478a1c3abebfc717db0d1281a9cdd7befafee542 git","platforms":[]},{"source":"CNA","vendor":"Linux","product":"Linux","version":"affected 7.0","platforms":[]},{"source":"CNA","vendor":"Linux","product":"Linux","version":"unaffected 7.0 semver","platforms":[]},{"source":"CNA","vendor":"Linux","product":"Linux","version":"unaffected 7.1.9 7.1.* semver","platforms":[]},{"source":"CNA","vendor":"Linux","product":"Linux","version":"unaffected 7.2 * original_commit_for_fix","platforms":[]}],"timeline":[],"solutions":[],"workarounds":[],"exploits":[],"credits":[],"nvd_cpes":[],"vendor_comments":[],"enrichments":{"kev":null,"epss":null,"legacy_qids":[]},"source_records":{"cve_program":{"containers":{"cna":{"affected":[{"defaultStatus":"unaffected","product":"Linux","programFiles":["mm/memory.c"],"repo":"https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git","vendor":"Linux","versions":[{"lessThan":"0b8ff21cbda8808c86b18f1b0ca2d0025af9a80a","status":"affected","version":"4c640eb4181cf8de74c8b9e7c9cf16bf8d26b73e","versionType":"git"},{"lessThan":"478a1c3abebfc717db0d1281a9cdd7befafee542","status":"affected","version":"4c640eb4181cf8de74c8b9e7c9cf16bf8d26b73e","versionType":"git"}]},{"defaultStatus":"affected","product":"Linux","programFiles":["mm/memory.c"],"repo":"https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git","vendor":"Linux","versions":[{"status":"affected","version":"7.0"},{"lessThan":"7.0","status":"unaffected","version":"0","versionType":"semver"},{"lessThanOrEqual":"7.1.*","status":"unaffected","version":"7.1.9","versionType":"semver"},{"lessThanOrEqual":"*","status":"unaffected","version":"7.2","versionType":"original_commit_for_fix"}]}],"cpeApplicability":[{"nodes":[{"cpeMatch":[{"criteria":"cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:*","versionEndExcluding":"7.1.9","versionStartIncluding":"7.0","vulnerable":true},{"criteria":"cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:*","versionEndExcluding":"7.2","versionStartIncluding":"7.0","vulnerable":true}],"negate":false,"operator":"OR"}]}],"descriptions":[{"lang":"en","value":"In the Linux kernel, the following vulnerability has been resolved:\n\nmm: fix incorrect flush address in direct page table reclaim\n\nWhen zap_pte_range reclaims a page table, it does:\n\n    pte_free_tlb(tlb, pmd_pgtable(pmdval), addr);\n\nand this is unconditionally wrong: if this code executes, addr *always*\npoints one past the end of the range covered by the table.  The addr\nparameter is used to flush the TLB (really the paging-structure-cache)\nto drop references to the to-be-freed table, and any architecture that\ncares about the parameter will flush the wrong address.  (But they'll\nstill free the correct page).\n\nI think it's worth contemplating why the kernel works at all.\n\nIf we hit the offending line of code, we will first clear the PMD entry\n(line 1954, zap_empty_pte_table), then we will issue pending flushes if\nforce_flush is set (tlb_flush_mmu_tlbonly(tlb)), then we will skip the\nretry on line 1979 (phew!), and then we will do the offending\npte_free_tlb call.  *Or* we will clear the PMD entry immediately before\npte_free_tlb (line 1983, zap_pte_table_if_empty).\n\nIf we have any pending flushes (i.e. we actually zapped any last-level\nentries) at the time we clear the PMD entry, then the flush really ought\nto flush all references to the table (Linus certainly seems to think it\nwill on all architectures [0]).\n\nThe condition under which we have no accumulated flushes at the time of\nthe clear is very complex (the whole zap_pte_range function has absurdly\ncomplex control flow).  If we do hit the bad case, then we will end up\nclearing the PMD entry after the last time the range is flushed, and any\nCPU is free to cache a reference to the (empty) page table.  If this\nhappens due to an ordinary read or write, it would segfault, so it would\nbe rare.  But the cache could be speculatively filled as well.  Then\nwe'll flush the wrong address and then free and possibly reuse the\ntable.\n\nOn x86, even flushing the wrong address works on non-KPTI Intel systems\nbecause INVLPG flushes *all* paging-structure-caches, not just the ones\nfor the target address.  But INVPCID does not, and flush_tlb_one_user\nwill use INVPCID if it's available.  And then we're toast.  AMD systems\nare more susceptible: we set the EFER.TCE bit, which makes even INVLPG\nonly flush the target address.\n\nI think this might fix an issue in ripgrep reported here:\nhttps://github.com/BurntSushi/ripgrep/issues/3494\n\n[0] https://lore.kernel.org/all/CA+55aFzBggoXtNXQeng5d_mRoDnaMBE5Y+URs+PHR67nUpMtaw@mail.gmail.com/T/#u"}],"providerMetadata":{"dateUpdated":"2026-08-22T15:32:43.670Z","orgId":"416baaa9-dc9f-4396-8d5f-8c081fb06d67","shortName":"Linux"},"references":[{"url":"https://git.kernel.org/stable/c/0b8ff21cbda8808c86b18f1b0ca2d0025af9a80a"},{"url":"https://git.kernel.org/stable/c/478a1c3abebfc717db0d1281a9cdd7befafee542"}],"title":"mm: fix incorrect flush address in direct page table reclaim","x_generator":{"engine":"bippy-1.2.0"}}},"cveMetadata":{"assignerOrgId":"416baaa9-dc9f-4396-8d5f-8c081fb06d67","assignerShortName":"Linux","cveId":"CVE-2026-74674","datePublished":"2026-08-22T15:32:43.670Z","dateReserved":"2026-08-15T05:44:03.925Z","dateUpdated":"2026-08-22T15:32:43.670Z","state":"PUBLISHED"},"dataType":"CVE_RECORD","dataVersion":"5.2"},"nvd":{"publishedDate":"2026-08-22 16:16:41","lastModifiedDate":"2026-08-22 16:16:41","problem_types":[],"metrics":[],"configurations":[]},"legacy_mitre":{"record":{"CveYear":"2026","CveId":"74674","Ordinal":"1","Title":"mm: fix incorrect flush address in direct page table reclaim","CVE":"CVE-2026-74674","Year":"2026"},"notes":[{"CveYear":"2026","CveId":"74674","Ordinal":"1","NoteData":"In the Linux kernel, the following vulnerability has been resolved:\n\nmm: fix incorrect flush address in direct page table reclaim\n\nWhen zap_pte_range reclaims a page table, it does:\n\n    pte_free_tlb(tlb, pmd_pgtable(pmdval), addr);\n\nand this is unconditionally wrong: if this code executes, addr *always*\npoints one past the end of the range covered by the table.  The addr\nparameter is used to flush the TLB (really the paging-structure-cache)\nto drop references to the to-be-freed table, and any architecture that\ncares about the parameter will flush the wrong address.  (But they'll\nstill free the correct page).\n\nI think it's worth contemplating why the kernel works at all.\n\nIf we hit the offending line of code, we will first clear the PMD entry\n(line 1954, zap_empty_pte_table), then we will issue pending flushes if\nforce_flush is set (tlb_flush_mmu_tlbonly(tlb)), then we will skip the\nretry on line 1979 (phew!), and then we will do the offending\npte_free_tlb call.  *Or* we will clear the PMD entry immediately before\npte_free_tlb (line 1983, zap_pte_table_if_empty).\n\nIf we have any pending flushes (i.e. we actually zapped any last-level\nentries) at the time we clear the PMD entry, then the flush really ought\nto flush all references to the table (Linus certainly seems to think it\nwill on all architectures [0]).\n\nThe condition under which we have no accumulated flushes at the time of\nthe clear is very complex (the whole zap_pte_range function has absurdly\ncomplex control flow).  If we do hit the bad case, then we will end up\nclearing the PMD entry after the last time the range is flushed, and any\nCPU is free to cache a reference to the (empty) page table.  If this\nhappens due to an ordinary read or write, it would segfault, so it would\nbe rare.  But the cache could be speculatively filled as well.  Then\nwe'll flush the wrong address and then free and possibly reuse the\ntable.\n\nOn x86, even flushing the wrong address works on non-KPTI Intel systems\nbecause INVLPG flushes *all* paging-structure-caches, not just the ones\nfor the target address.  But INVPCID does not, and flush_tlb_one_user\nwill use INVPCID if it's available.  And then we're toast.  AMD systems\nare more susceptible: we set the EFER.TCE bit, which makes even INVLPG\nonly flush the target address.\n\nI think this might fix an issue in ripgrep reported here:\nhttps://github.com/BurntSushi/ripgrep/issues/3494\n\n[0] https://lore.kernel.org/all/CA+55aFzBggoXtNXQeng5d_mRoDnaMBE5Y+URs+PHR67nUpMtaw@mail.gmail.com/T/#u","Type":"Description","Title":"mm: fix incorrect flush address in direct page table reclaim"}]}}}