CVE-2026-29643
Summary
| CVE | CVE-2026-29643 |
|---|---|
| State | PUBLISHED |
| Assigner | mitre |
| Source Priority | CVE Program / NVD first with legacy fallback |
| Published | 2026-04-20 22:16:23 UTC |
| Updated | 2026-04-20 22:16:23 UTC |
| Description | XiangShan (Open-source high-performance RISC-V processor) commit edb1dfaf7d290ae99724594507dc46c2c2125384 (2024-11-28) contains an improper exceptional-condition handling flaw in its CSR subsystem (NewCSR). On affected versions, certain sequences of CSR operations targeting non-existent/custom CSR addresses may trigger an illegal-instruction exception but fail to reliably transfer control to the configured trap handler (mtvec), causing control-flow disruption and potentially leaving the core in a hung or unrecoverable state. This can be exploited by a local attacker able to execute code on the processor to cause a denial of service and potentially inconsistent architectural state. |
Risk And Classification
Problem Types: n/a
Vendor Declared Affected Products
References
| Reference | Source | Link | Tags |
|---|---|---|---|
| github.com/OpenXiangShan/XiangShan/pull/3966 | [email protected] | github.com | |
| docs.riscv.org/reference/isa/priv/machine.html | [email protected] | docs.riscv.org | |
| docs.riscv.org/reference/isa/priv/priv-csrs.html | [email protected] | docs.riscv.org | |
| github.com/OpenXiangShan/XiangShan/issues/3959 | [email protected] | github.com | |
| CVE Program record | CVE.ORG | www.cve.org | canonical |
| NVD vulnerability detail | NVD | nvd.nist.gov | canonical, analysis |
No vendor comments have been submitted for this CVE.
There are currently no legacy QID mappings associated with this CVE.