CVE-2021-1104

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Summary

CVECVE-2021-1104
StatePUBLIC
Assigner[email protected]
Source PriorityCVE Program / NVD first with legacy fallback
Published2021-08-13 16:15:00 UTC
Updated2021-08-23 20:30:00 UTC
DescriptionThe RISC-V Instruction Set Manual contains a documented ambiguity for the Machine Trap Vector Base Address (MTVEC) register that may lead to a vulnerability due to the initial state of the register not being defined, potentially leading to information disclosure, data tampering and denial of service.

Risk And Classification

Problem Types: CWE-908

NVD Known Affected Configurations (CPE 2.3)

TypeVendorProductVersionUpdateEditionLanguage
Application Risc-v Instruction Set Manual All All All All

References

ReferenceSourceLinkTags
Video: Glitching RISC-V chips: MTVEC corruption for hardening ISA | Adam Zabrocki and Alex Matrosov, DEF CON 29 - RISC-V International CONFIRM riscv.org
CVE Program record CVE.ORG www.cve.org canonical
NVD vulnerability detail NVD nvd.nist.gov canonical, analysis

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